Peripheral Adaption Power Cell Network for High Efficiency and High Linearity Power Amplifier

This letter presents a smart power cell network design with peripheral adaption technique in a 2 μm GaAs HBT process. A distributed input matching circuit accompanying individual power cells, each with its own pre-determined emitter ballast resistor is used in power cell network to perform power adaption operation. The power cell network is optimized to further enhance efficiency especially at very low output power range with substantial linearity improvement over an entire output power range. Compared to traditional power cells used in power amplifier, the new design shows an increase of PAE by at least 5% and improvement of IMD3 by 10 dB at 2.4 GHz with 600 KHz frequency spacing in measurement. The fabricated PA achieves a saturated output power of 32 dBm with PAE of 48%, and its IMD3 is lower than -30 dB up to 30 dBm output power.