• DocumentCode
    842160
  • Title

    An 8-Gb/s simultaneous bidirectional link with on-die waveform capture

  • Author

    Casper, Bryan ; Martin, Aaron ; Jaussi, James E. ; Kennedy, Joe ; Mooney, Randy

  • Author_Institution
    Intel Labs., Hillsboro, OR, USA
  • Volume
    38
  • Issue
    12
  • fYear
    2003
  • Firstpage
    2111
  • Lastpage
    2120
  • Abstract
    A full-duplex transceiver capable of 8-Gb/s data rates is implemented in 0.18-μm CMOS. This equalized transceiver has been optimized for small area (329 μm × 395 μm) and low power (158 mW) for point-to-point parallel links. Source-synchronous clocking and per-pin skew compensation eliminate coding bandwidth overhead and reduce latency, jitter, and complexity. This link is self-configuring through the use of automatic comparator offset trim and adaptive deskew. Comprehensive diagnostic capabilities have been integrated into the transceiver to provide link, interconnect, and circuit characterization without the use of external test equipment. With a resolution of 4 mV and 9 ps, these capabilities enable on-die eye diagram generation, equivalent time waveform capture, noise characterization, and jitter distribution measurements.
  • Keywords
    CMOS integrated circuits; communication complexity; jitter; transceivers; 0.18 μm CMOS; 0.18 micron; 158 mW; 329 micron; 395 micron; 4 mV 9 ps resolution; 8 Gbit/s; 8-Gb/s simultaneous bidirectional link; adaptive deskew; automatic comparator offset trim; circuit characterization; coding bandwidth overhead elimination; complexity reduction; comprehensive diagnostic capabilities; equalized transceiver; full-duplex transceiver; high-speed I/O; interconnect; jitter distribution measurements; jitter reduction; latency reduction; noise characterization; on-die eye diagram generation; on-die oscilloscope; on-die waveform capture; per-pin skew compensation; point-to-point parallel links; preemphasis; self-configuration; self-testing; source-synchronous clocking; time waveform capture; Bandwidth; Character generation; Clocks; Delay; Integrated circuit interconnections; Jitter; Noise generators; Signal analysis; Test equipment; Transceivers;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2003.818569
  • Filename
    1253858