DocumentCode
842199
Title
Analytical threshold voltage model for short channel n+-p+ double-gate SOI MOSFETs
Author
Suzuki, Kunihiro ; Tosaka, Yoshiharu ; Sugii, Toshihiro
Author_Institution
Fujitsu Labs. Ltd., Atsugi, Japan
Volume
43
Issue
5
fYear
1996
fDate
5/1/1996 12:00:00 AM
Firstpage
732
Lastpage
738
Abstract
Solving a two-dimensional (2-D) Poisson equation in the channel region, we have developed models for short channel n+-p+ double-gate SOI MOSFETs, and showed how to design a device with a decreased gate length, suppressing short channel threshold voltage shift ΔVth and subthreshold swing (S-swing) degradation. According to our model, we can design a 0.05 μm LG device of which threshold voltage is 0.2 V, ΔVth is 25 mV, and S-swing is 65 mV/decade with a 3-nm-thick gate oxide and 12-nm-thick SOI
Keywords
MOSFET; semiconductor device models; silicon-on-insulator; 0.05 micron; 2D Poisson equation; Si; analytical model; double-gate SOI MOSFET; n+-p+ structure; short channel device; subthreshold swing degradation; threshold voltage model; threshold voltage shift; Analytical models; Boundary conditions; Channel bank filters; Doping; MOSFET circuits; Poisson equations; Semiconductor process modeling; Silicon; Temperature; Threshold voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.491249
Filename
491249
Link To Document