Title :
Design of multioperand carry-save adders for arithmetic modulo (2n+1)
Author_Institution :
Dept. of Electr. & Comput. Eng., Louisiana State Univ., Baton Rouge, LA, USA
Abstract :
The author presents the design of a multioperand adder for arithmetic modulo (2n+1). The adder uses the carry-saving approach and mainly consists of a group of full adders operating in parallel.
Keywords :
adders; carry logic; logic circuits; logic design; arithmetic modulo; carry-save adders; logic design; multioperand adder; parallel full adders;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19890773
