Title :
A CMOS line driver for ADSL central office applications
Author :
Bicakci, Ara ; Kim, Chun-Sup ; Lee, Sang-Soo
Author_Institution :
LSI Logic Corp., Milpitas, CA, USA
Abstract :
An ADSL central office (CO) line driver utilizing a single 6-V supply is described. The line driver output produces a 20-Vppd signal to deliver a 40-Vppd swing to a 100-Ω line. The adoption of an active termination, a dynamic supply control circuit technique, and deep n-well devices at the output stage of the line driver is key in achieving such a large voltage swing in a 0.25-μm CMOS process. In order to ensure reliability of the output devices, the dynamic supply control algorithm is designed to activate only one lift amplifier at each signal path of the differential line driver at any given time. A transformer turns ratio of 1:2.4 ensures both reliability and optimal power dissipation in the presence of system losses. The total power dissipation of the line driver is 700 mW when discrete multitone signals with a crest factor of 15 dB were used to deliver 20.4 dBm to a 100-Ω line.
Keywords :
CMOS analogue integrated circuits; digital subscriber lines; high-voltage techniques; power amplifiers; 0.25-μm CMOS process; 100-Ω line; 15 dB; 1:2.4 transformation; 20-Vppd signal; 40-Vppd swing; 6 V; 700 mW; ADSL CO line driver; ADSL central office applications; CMOS analog integrated circuits; CMOS line driver; active termination; crest factor; deep n-well devices; differential line driver; discrete multitone signals; driver circuits; dynamic supply control algorithm; dynamic supply control circuit technique; high-voltage techniques; line driver output; offset calibration; one lift amplifier; optimal power dissipation; output device reliability; power amplifiers; signal path; transformer turns; voltage swing; wire communication; Algorithm design and analysis; CMOS process; Central office; Differential amplifiers; Driver circuits; Heuristic algorithms; Power dissipation; Power system reliability; Signal design; Voltage control;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2003.818570
