A 4-GHz 8-b ADC system

Author

Schiller, Chris ; Byrne, Pat

Author_Institution

Hewlett-Packard Co., Santa Clara, CA, USA

Volume

26

Issue

12

fYear

1991

fDate

12/1/1991 12:00:00 AM

Firstpage

1781

Lastpage

1789

Abstract

The system described incorporates silicon bipolar, thick-film hybrid, and CMOS process technologies. A sampler chip providing filtered pulses to four analog-to-digital converter chips on one thick-film hybrid can provide 8 b of resolution and a 2-Gsample/s sampling rate. A novel sampling process called sample and filter is used to reduce the bandwidth requirements of post-sampling circuitry. Two thick-film hybrids with interleaved sample timing were used to obtain a 4-Gsample/s sample rate, 2-GHz bandwidth, and eight effective bits at DC. The goals for system functionality, resolution, bandwidth, and noise were all met with the initial prototypes of the chips and the thick-film hybrid

Keywords

CMOS integrated circuits; analogue-digital conversion; bipolar integrated circuits; data acquisition; hybrid integrated circuits; thick film circuits; 2 GHz; 4 GHz; 8 bit resolution; ADC system; CMOS process; FISO CMOS memory chip; Si; bandwidth requirements; interleaved sample timing; post-sampling circuitry; sample/filter technique; sampler chip; thick-film hybrid; Analog-digital conversion; Bandwidth; CMOS process; CMOS technology; Circuit noise; Filters; Prototypes; Sampling methods; Silicon; Timing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.104169

Filename

104169