Title :
A 10-GHz 8-b multiplexer/demultiplexer chip set for the SONET STS-192 system
Author :
Ishida, Kenji ; Wakimoto, Hirotsugu ; Yoshihara, Kunio ; Konno, Mitsuo ; Shimizu, Shoichi ; Kitaura, Yoshiaki ; Tomita, Kenichi ; Suzuki, Takashi ; Uchitomi, Naotaka
Author_Institution :
Toshiba Corp., Kawasaki, Japan
fDate :
12/1/1991 12:00:00 AM
Abstract :
An ultrahigh-speed 8-b multiplexer (MUX) and demultiplexer (DMUX) chip set has been developed for the synchronous optical network (SONET) next-generation optical-fiber communication systems, which will require data bit rates of about 10 Gb/s. These ICs were designed using three novel concepts: a tree-type architecture giving reliable operation, a dynamic divider with a wide operating range, and a 50-Ω on-chip transmission line with high-speed pulse propagation. They were fabricated using a 0.5-μm WNx-gate GaAs MESFET process. The DMUX and MUX operated at up to 10.4 and 11.4 GHz, respectively, both with an adequate phase margin of more than 230°
Keywords :
III-V semiconductors; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; multiplexing equipment; optical communication equipment; 0.5 micron; 10 Gbit/s; 11.4 to 10 GHz; 50 ohm; 50-Ω on-chip transmission line; 8 bit; GaAs; GaAs MESFET process; SONET; STS-192 system; WNx gate; data bit rates; dynamic divider; high-speed pulse propagation; multiplexer/demultiplexer chip set; next-generation optical-fiber communication systems; novel concepts; phase margin; reliable operation; semiconductors; synchronous optical network; tree-type architecture; ultrahigh-speed; wide operating range; Bit rate; High speed optical techniques; Multiplexing; Next generation networking; Optical fiber networks; Optical propagation; Optical pulses; SONET; Telecommunication network reliability; Transmission lines;
Journal_Title :
Solid-State Circuits, IEEE Journal of
