• DocumentCode
    842926
  • Title

    Shared-I/O scan test

  • Author

    Dervisoglu, Bulent I.

  • Author_Institution
    Silicon Graphics Inc., Mountain View, CA, USA
  • Volume
    12
  • Issue
    4
  • fYear
    1995
  • Firstpage
    81
  • Lastpage
    83
  • Abstract
    The IEEE P1149.2 standard seeks to implement several new features, such as shared-I/O cells, an optional parallel-update stage, and a high-impedance input pin. Although aspects of these features are incompatible with IEEE Std 1149.1, the working group strives to make P1149.2 consistent with the existing standard´s primary goals.
  • Keywords
    IEEE standards; logic testing; IEEE P1149.2 standard; boundary scan register cell; high-impedance input pin; parallel-update stage; shared-I/O scan test;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.491274
  • Filename
    491274
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=842926