Title :
Shared-I/O scan test
Author :
Dervisoglu, Bulent I.
Author_Institution :
Silicon Graphics Inc., Mountain View, CA, USA
Abstract :
The IEEE P1149.2 standard seeks to implement several new features, such as shared-I/O cells, an optional parallel-update stage, and a high-impedance input pin. Although aspects of these features are incompatible with IEEE Std 1149.1, the working group strives to make P1149.2 consistent with the existing standard´s primary goals.
Keywords :
IEEE standards; logic testing; IEEE P1149.2 standard; boundary scan register cell; high-impedance input pin; parallel-update stage; shared-I/O scan test;
Journal_Title :
Design & Test of Computers, IEEE
