Title :
A bit-slice architecture for sigma-delta analog-to-digital converters
Author :
Friedman, Vladimir ; Brinthaupt, Douglas M. ; Chen, D.-P. ; Deppa, Timothy ; Elward, John P., Jr. ; Fields, Evelyn M. ; Meleis, Hanafy
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
fDate :
4/1/1988 12:00:00 AM
Abstract :
The sigma-delta analog-to-digital converters is based on filtering and undersampling by the digital section of the one-bit output stream coming from the modulation. The structure of this section, consisting of a sine cubic FIR filter decimator followed by an IIR decimator section, is discussed. It is shown that from both signal processing and hardware implementation viewpoints it is advantageous to have the decimation factor of the first stage as large as possible. A bit-slice implementation of the decimation stages is given. It can be easily expanded when higher bit resolutions are required
Keywords :
analogue-digital conversion; digital filters; filtering and prediction theory; signal processing; IIR decimator section; bit-slice architecture; decimation factor; hardware implementation; modulation; sigma-delta analog-to-digital converters; signal processing; sine cubic FIR filter decimator; undersampling; Analog-digital conversion; Delta-sigma modulation; Digital filters; Digital modulation; Filtering; Finite impulse response filter; Hardware; IIR filters; Signal processing; Signal resolution;
Journal_Title :
Selected Areas in Communications, IEEE Journal on
