Amorphous Silicon Thin-Film Transistors Gated Through an Electrolyte Solution

Amorphous silicon thin-film transistors were fabricated on glass substrates in a top-gate configuration in which the metallic gate was replaced by an electrolytic solution with an immersed gate bias electrode. A silicon nitride passivation layer was used to avoid leakage and electrochemical reactions. Transfer and output curves showed transistor behavior. The threshold voltage of ion-sensitive thin-film transistors is controlled by the distribution of charges in solution and molecular dipoles within the ~1-nm-thick Debye layer at the dielectric-electrolyte interface. The device surface facing the electrolyte was chemically functionalized with a single monolayer of organic molecules, and a gate voltage shift of the order of 100 mV was measured in phosphate buffer upon surface modification.