• DocumentCode
    843457
  • Title

    A Residue-to-Binary Converter for a New Five-Moduli Set

  • Author

    Cao, Bin ; Chang, Chip-Hong ; Srikanthan, Thambipillai

  • Author_Institution
    Seagate Technol. Int., Singapore
  • Volume
    54
  • Issue
    5
  • fYear
    2007
  • fDate
    5/1/2007 12:00:00 AM
  • Firstpage
    1041
  • Lastpage
    1049
  • Abstract
    The efficiency of the residue number system (RNS) depends not only on the residue-to-binary converters but also the operand sizes and the modulus in each residue channel. Due to their special number theoretic properties, RNS with a moduli set consisting of moduli in the form of 2 nplusmn1 is more attractive than those with other forms of moduli. In this paper, a new five-moduli set RNS {2n-1,2n,2n+1,2n+1-1,2 n-1-1} for even n is proposed. The new moduli set has a dynamic range of (5n-1) bits. It incorporates two additional moduli to the celebrated three-moduli set, {2n-1,2n,2n +1} with VLSI efficient implementations for both the binary-to-residue conversion and the residue arithmetic units. This extension increases the parallelism and reduces the size of each residue channel for a given dynamic range. The proposed residue-to-binary converter relies on the properties of an efficient residue-to-binary conversion algorithm for {2n-1,2n,2n+1,2n+1-1} and the mixed-radix conversion (MRC) technique for the two-moduli set RNS. The hardware implementation of the proposed residue-to-binary converter employs adders as the primitive operators. Besides, it can be easily pipelined to attain a high throughput rate
  • Keywords
    VLSI; adders; convertors; residue number systems; VLSI; binary-to-residue conversion; mixed-radix conversion technique; parallelism; residue arithmetic units; residue channel; residue number system; residue-to-binary conversion algorithm; residue-to-binary converter; Adders; Application specific integrated circuits; Arithmetic; Dynamic range; Fault tolerant systems; Hardware; Image converters; Parallel processing; Read only memory; Very large scale integration; Mixed-radix conversion (MRC); VLSI; residue arithmetic; residue number system (RNS); residue-to-binary converter;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2007.890623
  • Filename
    4195626