DocumentCode :
843969
Title :
Reduced charge trapping in GaN MIS using gate oxide deposition technique
Author :
Sreenidhi, T. ; Baskar, K. ; DasGupta, A. ; DasGupta, N.
Author_Institution :
Dept. of Electr. Eng., IIT Madras, Chennai
Volume :
45
Issue :
10
fYear :
2009
Firstpage :
527
Lastpage :
528
Abstract :
A novel gate oxide deposition technique, thermal oxidation of deposited silicon (thermal-oxide), to realise a metal insulator semiconductor (MIS) structure on GaN is reported. Reduced gate leakage current and less flat-band voltage drift are achieved compared to plasma enhanced chemical vapour deposition to SiO2 deposited on GaN. The deposition and oxidation conditions have been optimised to achieve a high quality oxide/GaN interface.
Keywords :
II-VI semiconductors; MIS structures; gallium compounds; leakage currents; oxidation; plasma CVD; semiconductor growth; silicon compounds; wide band gap semiconductors; GaN-SiO2; MIS; charge trapping; deposited silicon; flat-band voltage drift; gate oxide deposition technique; metal insulator semiconductor structure; plasma enhanced chemical vapour deposition; reduced gate leakage current; thermal oxidation; thermal-oxide;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2009.0572
Filename :
4913382
Link To Document :
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