DocumentCode
844235
Title
A reduced-delay sampled-data hold
Author
Beliczynski, B. ; Kozinski, W.
Author_Institution
Warsaw Technical University, Warsaw, Poland
Volume
29
Issue
2
fYear
1984
fDate
2/1/1984 12:00:00 AM
Firstpage
179
Lastpage
181
Abstract
A data holding scheme whose phase delay is significantly less than that of the usual zero-order hold is presented. The improvement is achieved by the extrapolation of the intersample value of the output signal. Only simple additional software with a standard ZOH device is required.
Keywords
D/A converters; Digital-to-analog (D/A) conversion; Discrete-time systems; Control systems; Delay; Equations; Extrapolation; Filters; Least squares approximation; Least squares methods; Recursive estimation; Software standards; Stochastic processes;
fLanguage
English
Journal_Title
Automatic Control, IEEE Transactions on
Publisher
ieee
ISSN
0018-9286
Type
jour
DOI
10.1109/TAC.1984.1103472
Filename
1103472
Link To Document