Title :
An Si Schottky diode demultiplexer circuit for high bit-rate optical receivers
Author :
Choi, Jung Han ; Olbrich, Gerhard R. ; Russer, Peter
Author_Institution :
Inst. for High-Frequency Eng., Tech. Univ. Munchen, Munich, Germany
fDate :
6/1/2005 12:00:00 AM
Abstract :
We demonstrate an Si Schottky diode sampling demultiplexer circuit for an optical receiver. A system model and the operation principle of the sampling demultiplexer are described. The Si Schottky diode sampling circuit has been realized in conductor-backed coplanar waveguide technology and fabricated in thin-film technology. The sampling circuit module was measured using a 43-Gb/s nonreturn-to-zero signal. In addition, for the purpose of reducing the intersymbol interference, a linear tapped delay-line equalizer circuit has been designed and simulated. The weight of the taps has been calculated employing a zero-forcing algorithm.
Keywords :
Schottky diodes; coplanar waveguides; demultiplexing equipment; elemental semiconductors; equalisers; optical receivers; silicon; 43 Gbit/s; Schottky diode demultiplexer circuit; Schottky diode sampling circuit; Si; conductor-backed coplanar waveguide technology; delay-line equalizer circuit; flip-chip; high bit-rate optical receivers; intersymbol interference; linear tapped equalizer circuit; nonreturn-to-zero signal; root-diode model; sampling circuit module; sampling demultiplexer; thin-film technology; zero-forcing algorithm; Coplanar waveguides; Delay lines; Equalizers; Intersymbol interference; Optical receivers; Optical waveguides; Sampling methods; Schottky diodes; Semiconductor thin films; Thin film circuits; 160 Gb/s; 80 Gb/s; Coplanar waveguide (CPW); Si Schottky diode; demultiplexer; flip-chip; intersymbol interference (ISI); linear equalizer; optical receiver; root-diode model; sampling;
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
DOI :
10.1109/TMTT.2005.848820
