Analysis of electrical characteristics of gate overlapped lightly doped drain (GOLDD) polysilicon thin-film transistors with different LDD doping concentration

Different drain field architectures have been recently investigated to reduce field-enhanced effects in conventional self-aligned polysilicon thin-film transistor (TFT) architecture, induced by the intense electric fields at the drain junction. Among these, gate overlapped lightly doped drain (GOLDD) architecture has been shown to be effective in reducing the drain field in both on and off states of the TFT, without introducing appreciable series resistance effects. In this paper, we investigate the electrical characteristics, both in the on- and in the off-regime, of GOLDD polysilicon TFTs, made with different LDD doses, by combining experimental data with two-dimensional (2-D) numerical analysis. We also demonstrate that both the on-state and off-state features of the GOLDD structure can be readily understood in terms of a simple, new model, based upon two TFTs series. This is consistent both with the experimental data and the results of full 2-D simulations. This paper not only clarifies the dependence of kink effect, leakage current, and series resistance upon the LDD-doping, but also provides the guidelines to optimize physical parameters of GOLDD TFTs.