Title :
Self-aligned nickel, cobalt/tantalum nitride stacked-gate pMOSFETs fabricated with a low temperature process after metal electrode deposition
Author :
Pan, James ; Woo, Christy ; Ngo, Minh-Van ; Yang, Chih-Yuh ; Besser, Paul ; King, Paul ; Bernard, Joffre ; Adem, Ercan ; Tracy, Bryan ; Pellerin, John ; Xiang, Qi ; Ming-Ren Lin
Author_Institution :
Adv. Micro Devices Inc., Sunnyvale, CA, USA
Abstract :
This letter reports the first replacement (Damascene) metal gate pMOSFETs fabricated with Ni/TaN, Co/TaN stacked electrode, where Ni or Co is in direct contact with the gate SiO2, to adjust the electrode metal work function and TaN is used as the filling material for the gate electrode to avoid wet etching and CMP problems. The process is similar to the fabrication of traditional self-aligned polysilicon gate MOSFETs, except that in the back end (after the source/drain implants are activated) a few processing steps are added to replace the polysilicon with metal. Our data show that the Ni or Co/TaN gate electrode has the right work function for the pMOSFETs. The metal gate process can reduce the gate resistivity. Thermal stability of the stacked electrodes is studied and the result is reported in this paper. The damascene process flow bypasses high temperature steps (> 400°C)critical for metal gate and hi k materials. This paper demonstrates that a low temperature anneal (300°C) can improve the device performance. In this paper, the gate dielectrics is SiO2.
Keywords :
MOSFET; annealing; cobalt; nickel; oxidation; semiconductor device metallisation; tantalum compounds; thermal stability; work function; 300 C; Auger analysis; Co-TaN; Ni-TaN; activation annealing; damascene; dry etching; electrode metal work function; gate resistivity; low temperature anneal; low temperature process; metal electrode deposition; metal gate process; replacement metal gate; self-aligned stacked-gate pMOSFET; thermal oxidation; thermal stability; Cobalt; Electrodes; Fabrication; Filling; Implants; Inorganic materials; MOSFETs; Nickel; Temperature; Wet etching;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2003.819434