DocumentCode :
847824
Title :
An efficient software-controlled PLL for low-frequency applications
Author :
El-Amawy, Ahmed A. ; Mirbod, Ali
Author_Institution :
Louisiana State Univ., Baton Rouge, LA, USA
Volume :
35
Issue :
2
fYear :
1988
fDate :
5/1/1988 12:00:00 AM
Firstpage :
341
Lastpage :
344
Abstract :
The concept of a software-controlled phase-locked loop (SCPLL) is presented. It is shown that SCPLLs can offer several advantages over pure hardware implementations. An example design of an SCPLL for a power converter controller is presented, and the experimental results are reported. This SCPLL can efficiently substitute for the conventional hardware PLL used for timing and clock frequency multiplication in the control circuit of a power converter
Keywords :
controllers; phase-locked loops; power convertors; clock frequency multiplication; control circuit; low-frequency applications; power converter controller; software-controlled PLL; timing; Application software; Counting circuits; Delay; Frequency conversion; Frequency synchronization; Hardware; Phase frequency detector; Phase locked loops; Rectifiers; Voltage-controlled oscillators;
fLanguage :
English
Journal_Title :
Industrial Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0046
Type :
jour
DOI :
10.1109/41.192669
Filename :
192669
Link To Document :
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