Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance

Author

Narasimhulu, K. ; Sharma, Dinesh K. ; Rao, V. Ramgopal

Author_Institution

Dept. of Electr. Eng., Indian Inst. of Technol., Mumbai, India

Volume

50

Issue

12

fYear

2003

Firstpage

2481

Lastpage

2489

Abstract

In this paper, we have systematically investigated the effect of scaling on analog performance parameters in lateral asymmetric channel (LAC) MOSFETs and compared their performance with conventional (CON) MOSFETs for mixed-signal applications. Our results show that, in LAC MOSFETs, there is significant improvement in the intrinsic device performance for analog applications (such as device gain, gm/I_D etc.) down to the 70-nm technology node, in addition to an improvement in drive current and other parameters over a wide range of channel lengths. A systematic comparison on the performance of amplifiers and CMOS inverters with CON and LAC MOSFETs is also performed. The tradeoff between power dissipation and device performance is explored with detailed circuit simulations for both CON and LAC MOSFETs.

Keywords

CMOS integrated circuits; MOSFET; circuit simulation; mixed analogue-digital integrated circuits; semiconductor doping; system-on-chip; CMOS inverters; analog performance parameters; asymmetric channel MOSFET; cascode amplifiers; circuit simulations; deep submicrometer mixed-signal device; gain-bandwidth product; lateral asymmetric channel doping; mixed signal CMOS; power dissipation; scaling effect; source followers; system on chip; CMOS logic circuits; CMOS technology; Circuit optimization; Circuit simulation; Digital circuits; Doping; Integrated circuit technology; Los Angeles Council; MOSFETs; Radio frequency;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2003.820120

Filename

1255612