Improved force-directed scheduling in high-throughput digital signal processing

Author

Verhaegh, Wim F J ; Lippens, Paul E R ; Aarts, Emile H L ; Korst, Jan H M ; Van Meerbergen, Jef L. ; van der Werf, A.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

Volume

14

Issue

8

fYear

1995

fDate

8/1/1995 12:00:00 AM

Firstpage

945

Lastpage

960

Abstract

This paper discusses improved force-directed scheduling and its application in the design of high-throughput DSP systems, such as real-time video VLSL circuits. We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show how the algorithm can be used to find cost-effective time assignments and resource allocations, allowing trade-offs between processing units and memories. Furthermore, we present modifications that improve the effectiveness and the efficiency of the algorithm. The significance of the improvements is illustrated by an empirical performance analysis based on a number of problem instances

Keywords

digital signal processing chips; high level synthesis; processor scheduling; real-time systems; resource allocation; scheduling; cost-effective time assignments; empirical performance analysis; force-directed scheduling; high-level synthesis; high-throughput digital signal processing; problem instances; processing units; real-time video VLSL circuits; resource allocations; Clocks; Digital signal processing; Flow graphs; Frequency; Laboratories; Pipeline processing; Signal design; Signal processing algorithms; Signal sampling; Signal synthesis;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.402495

Filename

402495