An integrated GaAs n-p-n-p thyristor/JFET memory cell exhibiting nondestructive read

Author

Hetherington, D.L. ; Klem, John F. ; Weaver, Harry T.

Author_Institution

Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA

Volume

13

Issue

9

fYear

1992

Firstpage

476

Lastpage

478

Abstract

An integrated GaAs n-p-n-p thyristor-junction field effect transistor (JFET) structure displays memory by storing charge on the thyristor reverse-biased junctions. The device can be electrically programmed and erased through a single terminal. A buried p-channel, which also functions as the thyristor anode, is used to read stored charge nondestructively over a small range of applied drain voltages (+or-1.5 V). Measured storage times exceeded 10 s at room temperature with an activation energy of approximately 0.6 eV.<>

Keywords

III-V semiconductors; gallium arsenide; junction gate field effect transistors; monolithic integrated circuits; semiconductor storage; thyristors; 10 s; GaAs; activation energy; applied drain voltages; buried p-channel; charge storage; electrical programmability; integrated n-p-n-p thyristor JFET memory cell; nondestructive read; storage times; thyristor reverse-biased junctions; Anodes; Charge measurement; Current measurement; Displays; Energy measurement; Energy storage; FETs; Gallium arsenide; Thyristors; Voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.192800

Filename

192800