Title :
Pipelined Volterra filter
Author_Institution :
Dept. of Electr. Eng., Ottawa Univ., Ont., Canada
fDate :
6/18/1992 12:00:00 AM
Abstract :
A pipelined realisation for a kth order Volterra filter is introduced. Although it needs input data broadcasting, the realisation uses a minimum number of simple identical processing elements (PEs), produces a fixed output delay equal to the order of the filter, and is suitable for implementing adaptive Volterra filters.
Keywords :
adaptive filters; digital filters; pipeline processing; adaptive Volterra filters; fixed output delay; input data broadcasting; minimum number of processors; pipeline processing; pipelined realisation; simple identical processing elements;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19920808