Title :
Exploiting intellectual properties with imprecise design costs for system-on-chip synthesis
Author :
Kim, Byoung-Woon ; Kyung, Chong-Min
Author_Institution :
Div. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
fDate :
6/1/2002 12:00:00 AM
Abstract :
This paper presents an intellectual property (IP)-based system-on-chip (SoC) synthesis framework focusing on how to select IPs from different sources and how to integrate the selected IPs using on-chip buses. In order to synthesize an on-chip bus-based SoC architecture using IPs with imprecise design costs, we propose a possibilistic mixed integer linear programming (PMILP) model, which is converted into an equivalent mixed integer linear programming (MILP) model without increasing the computational complexity. Then, the equivalent MILP model is solved to decide whether each IP is selected or not, and to locate the selected IP on the optimal on-chip bus of a hierarchical bus architecture that consists of on-chip buses with different bus attributes. Experimental results on an MP3 decoding system show that the IP-centric design space with uncertainty can be successfully explored using the proposed scheme.
Keywords :
VLSI; circuit complexity; embedded systems; fuzzy logic; fuzzy set theory; hardware-software codesign; industrial property; integer programming; linear programming; possibility theory; system-on-chip; MP3 decoding system; W-centric design space; bus-based architecture; communication synthesis; computational complexity; design reuse; design space exploration; equivalent mixed integer linear programming; fuzzy programming; hierarchical bus architecture; imprecise design costs; intellectual property; on-chip buses; possibilistic mixed integer linear programming; reusable building blocks; system-on-chip synthesis; Computer architecture; Costs; Decoding; Digital audio players; Digital signal processing; Intellectual property; Mixed integer linear programming; Signal synthesis; System-on-a-chip; Uncertainty;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2002.1043327