Title :
Suppressing ability of germanium preamorphisation thicknesses combined with sub-keV boron implantation for drive current improvement
Author :
Wu, Meng-Chyi ; Chen, Li-Chih
Author_Institution :
Dept. of Electron. Eng., Nat. Tsing Hua Univ., Hsinchu
Abstract :
The nanoscale gate length of CMOS technology using germanium preamorphisation implantation (Ge PAI) is reported. By optimising the Ge PAI dose and amorphous thickness, the device characteristics can be enhanced and the fluctuations can be minimised. Optimum conditions of Ge PAI can also minimise the transient enhanced diffusion of boron by reducing the density of point defects generated by boron implants. Suppressing ability is related to the Ge amorphous layer thickness, which can be varied with the concentration ratio of 72 Ge to 74 Ge PAI doses. It is attributed to a gradated and thinner Ge amorphous layer to have a weak ability to suppress the channelling tail of boron than a uniform and thicker Ge amorphous layer at the same implanted dose.
Keywords :
CMOS integrated circuits; amorphisation; boron; germanium; ion implantation; nanotechnology; point defects; CMOS technology; Ge:B; amorphous layer thickness; boron implantation; drive current; germanium preamorphisation implantation; nanoscale gate length; point defects; transient enhanced diffusion;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20081946