• DocumentCode
    851681
  • Title

    Schematic-Driven Substrate Noise Coupling Analysis in Mixed-Signal IC Designs

  • Author

    Birrer, Patrick ; Arunachalam, Sasi Kumar ; Held, Martin ; Mayaram, Kartikeya ; Fiez, Terri S.

  • Author_Institution
    Cadence Design Systems, GmbH, Feldkirchen
  • Volume
    53
  • Issue
    12
  • fYear
    2006
  • Firstpage
    2578
  • Lastpage
    2587
  • Abstract
    This paper presents an approach to reduce substrate cross-talk noise between noisy and sensitive circuitry in mixed-signal integrated circuits at different stages of design and layout development. Silencer! a new, fully automated, schematic-driven substrate noise coupling analysis tool is introduced to accomplish this task. The tool seamlessly enables substrate noise coupling analysis in a standard mixed-signal design flow. Two different methods, fast scalable macro-models and a boundary element solver are integrated into Silencer!. These methods allow extractions of a substrate network from geometric layout information. Simulation results obtained with Silencer! are accurate to within 10% of measured integrated circuits
  • Keywords
    Circuit simulation; Computer science; Coupling circuits; Crosstalk; Data mining; Integrated circuit interconnections; Integrated circuit noise; Noise reduction; Space technology; System-on-a-chip; Coupling noise; integrated circuit noise; mixed-signal noise; noise analysis tool; noise minimization; pre-/post-layout analysis; substrate noise; substrate noise analysis; supply noise;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2006.885689
  • Filename
    4026665