DocumentCode :
851692
Title :
Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density
Author :
Brandon, Tyler L. ; Elliott, Duncan G. ; Cockburn, Bruce F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta.
Volume :
53
Issue :
12
fYear :
2006
Firstpage :
2595
Lastpage :
2605
Abstract :
ROM cell architectures are proposed that have roughly 20% greater storage density in the cell array compared to that of a conventional ROM. Increased density is achieved by exploiting the multiple interconnect layers now available in common logic processes and by using multiple ROM cell types in combination. The storage density of arrays of these hybrid ROM cells increases further as more interconnect layers become available. In addition, a new SRAM-ROM architecture is presented that capitalizes on these techniques to add ROM capability to a conventional SRAM cell with no additional transistors in the memory cell and little or, in some cases, no impact on the cell area
Keywords :
Councils; Decoding; Integrated circuit interconnections; Integrated circuit technology; Logic; Random access memory; Read only memory; Research and development; Routing; Silicon; Memory architecture; ROM; SRAM; SRAM-ROM; multiple bitlines (BLs); read-only memory; stacked BLs;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2006.885995
Filename :
4026666
Link To Document :
بازگشت