A 10 bit, 300 MS/s Nyquist Current-Steering Power DAC With 6 V $_{\rm PP}$ Output Swing

A 10 bit current-steering, digital-to-analog converter (DAC) is presented that delivers 6 V PP into a 100 Ω differential load. To realize high-voltage swings using fineline CMOS, a stacked-FET buffer is used to isolate the current source from the output load. The stacked-FET buffer degrades the linearity of the DAC. This work presents a Volterra analysis to capture the frequency-dependent behavior of the stacked-FET circuit that can be cascaded to quantify the linearity of an N-device stack. The power DAC is implemented in 45 nm CMOS SOI and the measured differential nonlinearity (DNL) and integral nonlinearity (INL) is better than 0.4 and 0.6 LSB, respectively. The DAC consumes 476 mW and achieves a peak SFDR of 73 dB and a minimum IM3 of -69 dBc. This DAC demonstrates the largest output swing and highest power efficiency for a high-resolution ( >8 bit), high-speed ( >100 MS/s) DAC.