• DocumentCode
    852273
  • Title

    Novel content addressable memory

  • Author

    Ghosh, Debashis ; Daly, J.C. ; Fried, J.

  • Author_Institution
    Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
  • Volume
    25
  • Issue
    8
  • fYear
    1989
  • fDate
    4/13/1989 12:00:00 AM
  • Firstpage
    524
  • Lastpage
    526
  • Abstract
    The design and performance of a content addressable memory (CAM) LSI using a newly developed cell circuit is presented. The LSI has all the functions necessary to implement a high-speed data searching system and is fabricated using a 3 mu m CMOS double-metallisation process. A cycle time of 60 ns with the basic associative operation taking 20 ns has been measured.
  • Keywords
    CMOS integrated circuits; content-addressable storage; integrated memory circuits; large scale integration; 20 ns; 3 micron; 60 ns; CAM; CMOS double-metallisation process; LSI; associative operation; cell circuit; content addressable memory; cycle time; high-speed data searching system; parallel processing;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19890359
  • Filename
    46144
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=852273