CYCLONE: automated design and layout of RF LC-oscillators

Author

De Ranter, Carl R C ; Van der Plas, Geert ; Steyaert, Michiel S J ; Gielen, Georges G E ; Sansen, Willy M C

Author_Institution

Dept. of Electr. Eng., Katholieke Univ., Leuven, Belgium

Volume

21

Issue

10

fYear

2002

fDate

10/1/2002 12:00:00 AM

Firstpage

1161

Lastpage

1170

Abstract

This paper presents a specification-driven layout-aware CMOS RF LC-oscillator design tool called CYCLONE. Circuit sizing and layout generation are integrated in the overall oscillator optimization. The tool optimizes the device sizes and also determines the optimal geometrical parameters of the on-chip inductor and automatically performs electromagnetic simulations to exactly calculate its losses during sizing. For the other devices in the oscillator circuit, being gain cell and varactor diode, it uses a technology-independent template-based layout generation approach to obtain accurate predictions of the actual layout parasitics. The device sizing of the gain cell is based on an operating-point linearized BSIM3 model of the gain cell transistors. The varactor diode is sized based on the BSIM3 source/drain diode models of the pMOS transistor. All parasitics; are incorporated in a global optimization of the complete oscillator circuit. After optimization of the circuit, the layout can be exported to a standard GDSII format for processing. The capabilities of the tool are demonstrated by several design experiments.

Keywords

CMOS analogue integrated circuits; circuit layout CAD; circuit optimisation; circuit simulation; finite element analysis; integrated circuit layout; phase noise; radiofrequency oscillators; simulated annealing; voltage-controlled oscillators; CMOS LC-oscillator; CYCLONE tool; RF LC-oscillator design; VCO; automated design; automated layout; circuit sizing; electromagnetic simulations; finite-element analysis; gain cell; global optimization; layout parasitics; module generators; on-chip inductor; operating-point linearized BSIM3 model; optimal geometrical parameters; simulated annealing; specification-driven layout-aware design tool; standard GDSII format; template-based layout generation; varactor diode; Circuits; Cyclones; Diodes; Electromagnetic devices; Electromagnetic induction; Inductors; Oscillators; Radio frequency; Solid modeling; Varactors;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/TCAD.2002.802267

Filename

1043899