DocumentCode :
854738
Title :
Two-chip MPEG-2 video encoder
Author :
Kondo, Toshio ; Suguri, Kazuhito ; Ikeda, Makoto ; Abe, Tetsuya ; Matsuda, Hiroaki ; Okubo, Tsuneo ; Ogura, Kenji ; Tashiro, Yutaka ; Ono, Naoki ; Minami, Toshihiro ; Kusaba, Ritsu ; Ikenaga, Takeshi ; Shibata, Nobutaro ; Kasai, Ryota ; Otsu, Koji ; Nakag
Author_Institution :
NTT LSI Labs., Kanagawa, Japan
Volume :
16
Issue :
2
fYear :
1996
fDate :
4/1/1996 12:00:00 AM
Firstpage :
51
Lastpage :
58
Abstract :
Our two-chip, real time, MPEG-2, simple-profile-at-main-level encoder supports NTSC 4:2:0 video signals with only three external memories. We have developed a compact encoder chip set. The key features of this chip set are a low encoding delay based on a simple profile at main level; wide-range motion estimation, which it performs using a hierarchical search; a flexible, macroblock level pipeline architecture based on RISC CPUs; and three small peripherals with no glue logic: a VRAM, synchronous DRAM, and FIFO DRAM
Keywords :
data compression; digital signal processing chips; motion estimation; video codecs; video coding; Moving Pictures Experts Group standard; NTSC 4:2:0 video signals; digital cable television; digital video disks; external memories; motion estimation; real-time encoding; two-chip real time MPEG-2 simple-profile-at-main-level encoder; video codec system; video on demand; Decoding; Delay estimation; Encoding; Hardware; Motion estimation; Search methods; Telegraphy; Telephony; Video compression; Video on demand;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.491462
Filename :
491462
Link To Document :
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