• DocumentCode
    855805
  • Title

    Programmable Deblocking Filter Architecture for a VC-1 Video Decoder

  • Author

    Citro, Ricardo ; Guerrero, Miguel ; Lee, Jae-Beom ; Pantoja, Maria

  • Author_Institution
    Intel Corp., Chandler, AZ, USA
  • Volume
    19
  • Issue
    8
  • fYear
    2009
  • Firstpage
    1227
  • Lastpage
    1233
  • Abstract
    Although the current standards (MPEG1, MPEG2, MPEG4, H.261, H.263, and H.264/MPEG4 AVC) as well as the recent VC-1, present the same basic functional elements, i.e., prediction, transformation, quantization, and entropy encoding, important changes occur in the details of each functional element. One of the details concerns the elimination of the loss in interblock correlation due to block-based prediction, transformation, and quantization. In order to overcome the loss in blocking artifacts, a deblocking filtering method is necessary to maximize coding performance and consequently improve image quality. This letter describes a programmable VC-1 deblocking filter architecture with capabilities to support different standards. The architecture has been modeled, simulated, and implemented at the register transfer level. Results show a threefold performance improvement as compared to solutions where filtering algorithms are otherwise not hardwired. Results also point to parallelism based on existing data flow, and show that real-time requirements can be met.
  • Keywords
    entropy; filtering theory; quantisation (signal); video coding; VC-1 video decoder; coding performance; entropy encoding; image quality; interblock correlation; programmable deblocking filter; quantization; real-time requirements; register transfer level; Deblocking; firmware; video coding; video filtering;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems for Video Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1051-8215
  • Type

    jour

  • DOI
    10.1109/TCSVT.2009.2022699
  • Filename
    4914812