• DocumentCode
    855992
  • Title

    Adaptive History-Based Memory Schedulers for Modern Processors

  • Author

    Hur, Ibrahim ; Lin, Calvin

  • Author_Institution
    Future Processor Performance Dept., IBM Corp.
  • Volume
    26
  • Issue
    1
  • fYear
    2006
  • Firstpage
    22
  • Lastpage
    29
  • Abstract
    Careful memory scheduling can increase memory bandwidth and overall system performance. We present a new memory scheduler that makes decisions based on the history of recently scheduled operations, providing two advantages: it can better reason about the delays associated with complex DRAM structure, and it can adapt to different observed workload
  • Keywords
    DRAM chips; data structures; scheduling; storage management; DRAM; adaptive history-based memory schedulers; memory bandwidth; modern processors; Adaptive scheduling; Bandwidth; Delay; Hardware; History; Multithreading; Prefetching; Processor scheduling; Random access memory; Streaming media; DRAM; IBM Power5; Memory schedulers; memory bandwidth; processors;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.2006.1
  • Filename
    1603494
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=855992