DocumentCode
856039
Title
Quality enhancement of reconfigurable multichip module systems by redundancy utilization
Author
Choi, Minsu ; Park, Nohpill ; Lombardi, Fabrizio ; Piuri, Vincenzo
Author_Institution
Dept. of Comput. Sci., Oklahoma State Univ., Stillwater, OK, USA
Volume
51
Issue
4
fYear
2002
fDate
8/1/2002 12:00:00 AM
Firstpage
740
Lastpage
749
Abstract
This paper evaluates the quality effectiveness of redundancy utilization in reconfigurable multichip mode (RMCM) systems. Due to reconfigurability, the RMCM system can implement a device with different redundancy levels. A redundancy level is determined by the requirement of fault tolerance (FT) of the device under implementation which can be realized through reconfiguration. No previous work has adequately investigated the effect of utilization of redundancy on the quality-level (QL) of RMCM. In this paper, the tolerance to escape from testing is also introduced to provide more extensive and comprehensive analysis and is referred to as escape tolerance (ET). This can be achieved by utilizing an appropriate amount of redundancy and is exploited for evaluating its effect on the QL of RMCM with different utilizations of redundancy. It is shown through theoretical analysis that the coverage of testing [i.e., fault coverage (FC)] can be improved by reconfiguration. Thus, we derive the QL by relating the QL to the yield enhancement by reconfiguration, the effect of interconnection yield and ET on the QL, and the improvement in FC by reconfiguration. In the proposed approaches, appropriate combinatorial models are formulated to take into account the parameters related to the redundancy and reconfiguration process in RMCM systems. From the extensive parametric simulation results, it is shown that there exists a bound in the effectiveness of redundancy utilization (i.e., the amount of redundancy) depending on the RMCM yield and FC. Using the proposed approach, the redundancy utilization in RMCM systems can be appropriately used to enhance the QL.
Keywords
VLSI; fault diagnosis; fault tolerance; field programmable gate arrays; multichip modules; reconfigurable architectures; redundancy; FPGA; acceptable assembly yield; combinatorial models; escape tolerance; fault coverage; fault tolerance; field-programmable system; interconnection yield; quality enhancement; rapid hardware; reconfigurable multichip module systems; redundancy utilization; yield enhancement; Application specific integrated circuits; Fault tolerance; Fault tolerant systems; Field programmable gate arrays; Integrated circuit interconnections; Manufacturing; Multichip modules; Programmable logic arrays; Redundancy; Testing;
fLanguage
English
Journal_Title
Instrumentation and Measurement, IEEE Transactions on
Publisher
ieee
ISSN
0018-9456
Type
jour
DOI
10.1109/TIM.2002.803305
Filename
1044719
Link To Document