A 1680-V (at 1 $\hbox {mA/cm}^{2}$ ) 54-A (at 780 $\hbox {W/cm}^{2}$ ) Normally ON 4H-SiC JFET

A high-voltage normally ON 4H-SiC vertical junction field-effect transistor (VJFET) of 0.143- cm² active area was manufactured in seven photolithographic levels with no epitaxial regrowth and with a single masked ion-implantation event. The VJFET exhibits low gate-to-source p-n-junction leakage current with relatively sharp onset of breakdown. At a drain-current density of 1 mA/cm², the VJFET blocks 1680 V at a gate bias of -24 V. A self-aligned floating guard-ring structure provides edge termination that blocks 77% of the 11.8-mum SiC drift layer´s limit. At a gate bias of 2.5 V and a corresponding gate current of 2 mA, the VJFET outputs 53.6 A (375 A/cm²) at a forward drain voltage drop of 2.08 V (780 W/cm²). The transistor current gain is ID / IG = 26 800, and the specific on-state resistance is 5.5 mOmegamiddotcm². To our best knowledge, this is the largest area SiC vertical-channel JFET reported to date and outputs more drain current than any 1200-V class vertical-channel JFET under identical heat-load and gate biasing conditions.