Title :
VLSI architecture for high-speed rank and median filtering
Author_Institution :
GEC-Marconi Res. Centre, Chelmsford
fDate :
9/1/1988 12:00:00 AM
Abstract :
A VLSI architecture is presented for high-speed 1D and multidimensional rank filtering. The filter also provides the location of the output sample in the input data window. The rank, size and shape of the filter are variable
Keywords :
VLSI; digital filters; digital integrated circuits; picture processing; 1D rank filtering; VLSI architecture; digital image filtering; high speed filtering; input data window; median filtering; multidimensional rank filtering;
Journal_Title :
Electronics Letters
