• DocumentCode
    859221
  • Title

    Improved clock buffer with high PSRR for SC circuit applications

  • Author

    VanPeteghem, P.M.

  • Author_Institution
    Texas A&M Univ., College Station, TX, USA
  • Volume
    25
  • Issue
    1
  • fYear
    1989
  • Firstpage
    15
  • Lastpage
    16
  • Abstract
    Clock feedthrough in SC circuits results in low PSRR figures, incompatible with high-performance signal processing. A high-PSRR CMOS clock buffer is presented here, which blocks this power supply (PS) noise coupling path. The presented circuit is a significant improvement over an earlier circuit proposed by the same author, but having a PSRR of over 40 dB now.
  • Keywords
    CMOS integrated circuits; buffer circuits; clocks; switched capacitor networks; PSRR figures; SC circuits; clock buffer; high-PSRR CMOS clock buffer; signal processing;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19890011
  • Filename
    19638
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=859221