Title :
Superconducting integrated circuit fabrication with low temperature ECR-based PECVD SiO/sub 2/ dielectric films
Author :
Sauvageau, J.E. ; Burroughs, C.J. ; Booi, P.A.A. ; Cromar, M.W. ; Benz, R.P. ; Koch, J.A.
Author_Institution :
Nat. Inst. of Stand. & Technol., Boulder, CO, USA
fDate :
6/1/1995 12:00:00 AM
Abstract :
A superconducting integrated circuit fabrication process has been developed to encompass a wide range of applications such as Josephson voltage standards, VLSI scale array oscillators, SQUIDs, and kinetic-inductance-based devices. An optimal Josephson junction process requires low temperature processing for all deposition and etching steps. This low temperature process involves an electron cyclotron resonance-based plasma-enhanced chemical vapor deposition of SiO/sub 2/ films for interlayer dielectrics. Experimental design and statistical process control techniques have been used to ensure high quality oxide films. Oxide and niobium etches include endpoint detection and controlled overetch of all films. An overview of the fabrication process is presented.<>
Keywords :
dielectric thin films; integrated circuit technology; plasma CVD coatings; silicon compounds; sputter etching; superconducting integrated circuits; ECR PECVD SiO/sub 2/ films; Josephson junction; Josephson voltage standards; Nb; SQUIDs; SiO/sub 2/; VLSI scale array oscillators; endpoint detection; etching; experimental design; interlayer dielectrics; kinetic-inductance-based devices; low temperature processing; niobium; overetch; oxide; statistical process control; superconducting integrated circuit fabrication; Electrons; Etching; Fabrication; Josephson junctions; Plasma temperature; SQUIDs; Standards development; Superconducting integrated circuits; Very large scale integration; Voltage-controlled oscillators;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
