DocumentCode :
8610
Title :
A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology
Author :
Okamoto, Yuki ; Nakagawa, Takashi ; Aoki, Takeshi ; Ikeda, Masataka ; Kozuma, Munehiro ; Osada, Takeshi ; Kurokawa, Yoshiyuki ; Ikeda, Takayuki ; Yamade, Naoto ; Okazaki, Yutaka ; Miyairi, Hidekazu ; Fujita, Masahiro ; Koyama, Jun ; Yamazaki, Shunpei
Author_Institution :
Semicond. Energy Lab. Co., Ltd., Atsugi, Japan
Volume :
23
Issue :
3
fYear :
2015
fDate :
Mar-15
Firstpage :
422
Lastpage :
434
Abstract :
A boosting pass gate (BPG) suitable for a programmable routing switch including a c-axis aligned crystal In-Ga-Zn-O (CAAC-IGZO) field effect transistor (FET) is proposed. The CAAC-IGZO is one of crystalline oxide semiconductors (OS). The proposed BPG (OS-based BPG, OS BPG) has a combination of a pass gate (PG) and a configuration memory (CM) cell utilizing a CAAC-IGZO FET with extremely low OFF-state current and a storage capacitor. This OS BPG achieves a routing switch with fewer transistors than a conventional routing switch having a combination of a PG and an static RAM (SRAM) cell. Owing to the boosting effect, the switching characteristics, at not only positive transition but also negative transition of input signals, of the OS BPG are improved without using overdriving. In circuits fabricated with a hybrid process of a CMOSFET and a CAAC-IGZO FET with gate lengths of 0.5 and 1.0 μm, the net delays of the OS BPG, 75 and 58 ns, at driving voltages of 2.0 and 2.5 V have been found to be less than those of the conventional routing switch (SRAM-based PG, SRAM PG) by about 79% and 62%, respectively. It has also been confirmed that a field-programmable gate array (FPGA) chip utilizing the OS BPG as a routing switch reduces the layout areas of routing switches and the whole chip by 61% and 22%, respectively, and increases the maximum operating frequencies at driving voltage of 2.0 and 2.5 V by about 2.8 times and 1.6 times of those of the FPGA chip utilizing the SRAM PG as a routing switch.
Keywords :
MOSFET; SRAM chips; field effect transistor switches; field programmable gate arrays; gallium; indium; oxygen; zinc; CM cell; CMOSFET; FPGA chip; In-Ga-Zn-O; OS-based BPG; SRAM cell; boosting pass gate; c-axis aligned crystal FET; configuration memory cell; crystalline oxide semiconductors; extremely low OFF-state current; field effect transistor; field-programmable gate array chip; hybrid process; programmable routing switch; size 0.5 mum; size 1.0 mum; static RAM cell; storage capacitor; switching characteristic improvement; time 58 ns; time 75 ns; voltage 2.0 V; voltage 2.5 V; Field effect transistors; Logic gates; Random access memory; Routing; Switches; Tin; Boosting effect; In-Ga-Zn-O (IGZO); field-programmable gate array (FPGA); oxide semiconductor; programmable logic device; programmable switch; reconfigurable system; reconfigurable system.;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2014.2316871
Filename :
6816099
Link To Document :
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