A CMOS Harmonic Rejection Mixer With Mismatch Calibration Circuitry for Digital TV Tuner Applications

A harmonic rejection mixer with mismatch calibration circuitry in direct-conversion receiver architecture for digital TV tuner applications is designed and fabricated in 0.18-mum CMOS technology. Odd harmonic mixing in the 48-862 MHz digital TV frequency band between the input signal and the local oscillator harmonics is a critical problem for direct-conversion receivers which require a harmonic rejection of over -60 dBc for ATSC terrestrial and cable digital TV standards. Without calibration, harmonic rejection mixers show a rejection ratio of the third and fifth harmonics in the range of -30 to -40 dBc due to phase and/or gain mismatch. The implemented harmonic rejection mixer with the proposed calibration circuitry consistently achieves more than -70 dBc of third harmonic rejection without degrading other performances such as gain, noise figure, linearity, and power consumption.