Design and operation of a Quantum Flux Parametron bit-slice ALU

Author

Hioe, W. ; Hosoya, M. ; Kominami, S. ; Yamada, H. ; Mita, R. ; Takagi, K.

Author_Institution

Central Res. Lab., Hitachi Ltd., Kokubunji, Japan

Volume

5

Issue

2

fYear

1995

fDate

6/1/1995 12:00:00 AM

Firstpage

2992

Lastpage

2995

Abstract

The design of Quantum Flux Parametron (QFP) majority logic circuits presents a number of unique constraints. For example, interconnects must be kept short and have a common small inductance. The former suggests that the bit-slice architecture is well suited to QFP circuits. In order to test this conjecture, a suitably complex logic circuit was designed and a small part of it was fabricated. A design for a 16-function bit-slice arithmetic-logic unit (ALU) was found that satisfied the constraints. It can compute on n-bit operands in 2n+4 QFP stages. A reduced version of the bit-slice ALU cell, containing 30 QFP´s, was fabricated and successfully tested at low speed. The design experience showed that complex combinatorial QFP logic circuits are possible. Larger circuits will be feasible with computer-aided tools.<>

Keywords

bit-slice computers; combinational circuits; majority logic; superconducting logic circuits; Quantum Flux Parametron; arithmetic-logic unit; bit-slice architecture; combinatorial QFP logic circuits; inductance; interconnects; majority logic circuits; Circuit testing; Clocks; Electronics packaging; Inductance; Integrated circuit interconnections; Logic circuits; Logic design; Logic devices; Logic testing; Routing;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.403221

Filename

403221