DocumentCode
862680
Title
Adder-accumulator cells in RSFQ logic
Author
Martinet, S.S. ; Brock, D.K. ; Feldman, M.J. ; Bocko, M.F.
Author_Institution
Dept. of Electr. Eng., Rochester Univ., NY, USA
Volume
5
Issue
2
fYear
1995
fDate
6/1/1995 12:00:00 AM
Firstpage
3006
Lastpage
3009
Abstract
We are in the process of designing a Finite Impulse Response (FIR) filter for use in a Digital Signal Processing (DSP) system based entirely on Rapid Single Flux Quantum (RSFQ) logic. One aspect of this project involves the development of the arithmetic unit of the filter, in this case an adder-accumulator multiplier. This article describes two cells can perform the function of accumulated addition in the adder-accumulator multiplier. We have fabricated both cells and tested them at low speed.<>
Keywords
FIR filters; adders; multiplying circuits; superconducting logic circuits; Digital Signal Processing; Finite Impulse Response filter; RSFQ cells; Rapid Single Flux Quantum logic; adder-accumulator multiplier; arithmetic unit; Adders; Arithmetic; Circuits; Clocks; Digital filters; Digital signal processing; Finite impulse response filter; Latches; Logic arrays; Process design;
fLanguage
English
Journal_Title
Applied Superconductivity, IEEE Transactions on
Publisher
ieee
ISSN
1051-8223
Type
jour
DOI
10.1109/77.403224
Filename
403224
Link To Document