Title :
Data Collticn from FASTBUS to a PDP-11 Throgh the UNIBUS-Ppocessor Inerface
Author :
Larwill, M. ; Pordes, R. ; Barsotti, E. ; Lesny, D.
Author_Institution :
Fermi National Accelerator Laboratory P. O. Box 500, Batavia, Illinois 60510
Abstract :
This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the PDP-ll UNIBUS developed by Fermilab and the University of Illinois. Details of how this interface was used in a high energy physics experiment at Fermi National Accelerator Laboratory are given.
Keywords :
Arithmetic; Fastbus; Finite impulse response filter; Laboratories; Logic; Magnetic analysis; Magnetic separation; PROM; Read-write memory; Registers;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.1983.4332251
