A 14-bit delta-sigma ADC with 8× OSR and 4-MHz conversion bandwidth in a 0.18-μm CMOS process

Author

Jiang, Ruoxin ; Fiez, Terri S.

Author_Institution

Maxim Integrated Products, Hillsboro, OR, USA

Volume

39

Issue

1

fYear

2004

Firstpage

63

Lastpage

74

Abstract

A 14-bit 8× oversampling delta-sigma (ΔΣ) analog-to-digital converter (ADC) for wide-band communication applications has been developed. By using a novel architecture, a high maximum out-of-band quantization noise gain (Q_max) is realized, which greatly improves the SNR and tonal behavior. The ADC employs a fifth-order single-stage structure with a 4-bit quantizer. It achieves 82-dB SNDR and 103-dB SFDR at 4-MHz conversion bandwidth with a single 1.8-V power supply.

Keywords

CMOS integrated circuits; VHF circuits; analogue-digital conversion; delta-sigma modulation; integrated circuit noise; modulators; 1.8 V; 14 bit; 14-bit delta-sigma ADC; 4 MHz; 4 bit; 4-bit quantizer; CMOS process; OSR; SFDR; SNDR; analog-to-digital converter; conversion bandwidth; fifth-order single-stage structure; out-of-band quantization noise gain; oversampling delta-sigma; power supply; wide-band communication applications; Amplitude modulation; Bandwidth; Baseband; CMOS process; Frequency; Noise level; Noise shaping; Quantization; Signal to noise ratio; Transfer functions;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2003.820877

Filename

1261289