DocumentCode :
863758
Title :
On the profile design and optimization of epitaxial Si- and SiGe-base bipolar technology for 77 K applications. II. Circuit performance issues
Author :
Cressler, John D. ; Crabbé, Emmanuel F. ; Comfort, James H. ; Stork, Johannes M C ; Sun, Jack Y C
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume :
40
Issue :
3
fYear :
1993
fDate :
3/1/1993 12:00:00 AM
Firstpage :
542
Lastpage :
556
Abstract :
For pt.I see ibid., vol.40, no.3, p.525-41 (1993). The circuit performance issues associated with optimizing epitaxial Si- and SiGe-base bipolar technology for the liquid-nitrogen temperature environment are examined in detail. It is conclusively demonstrated that the notion that silicon-based bipolar circuits perform poorly at low temperatures is untrue. Transistor frequency response is examined both theoretically and experimentally, with particular attention given to the differences between SiGe and Si devices as a function of temperature. ECL and NTL ring oscillator circuits were fabricated for each of the four profiles described in pt.I. The minimum ECL gate delay for a SiGe base is essentially unchanged from its room-temperature value. ASTAP models were used to explore circuit operation under typical wire loading. The results indicate that epitaxial-base bipolar technology offers significant leverage for future cryogenic applications
Keywords :
Ge-Si alloys; bipolar integrated circuits; bipolar transistors; doping profiles; elemental semiconductors; emitter-coupled logic; leakage currents; semiconductor epitaxial layers; semiconductor materials; silicon; 77 K; ASTAP models; ECL gate delay; ECL ring oscillators; LNT; NTL ring oscillator circuits; Si base bipolar transistors; Si transistors; SiGe base bipolar transistors; circuit operation; circuit performance issues; cryogenic applications; epitaxial-base bipolar technology; frequency response; nonthreshold logic; optimization; profile design; semiconductors; temperature effect; wire loading; Circuit optimization; Delay; Design optimization; Frequency response; Germanium silicon alloys; Ring oscillators; Semiconductor process modeling; Silicon germanium; Temperature; Wire;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.199359
Filename :
199359
Link To Document :
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