• DocumentCode
    863905
  • Title

    High-voltage amorphous silicon thin-film transistors

  • Author

    Martin, Russel A. ; Da Costa, Victor M. ; Hack, Michael ; Shaw, John G.

  • Author_Institution
    Xerox PARC, Palo Alto, CA, USA
  • Volume
    40
  • Issue
    3
  • fYear
    1993
  • fDate
    3/1/1993 12:00:00 AM
  • Firstpage
    634
  • Lastpage
    644
  • Abstract
    High-voltage MOSFETs have been fabricated in a large-area thin-film amorphous silicon technology. The transistors have an offset gate structure which allows them to operate at an excess of 400 V. Basic fabrication steps and structure are discussed. These transistors have a gate-controlled region in series with an offset region where the current is space charge limited. The ID-VD characteristics exhibit a unique instability under drain voltage stress; there is a parallel shift in the ID versus VD characteristic to a higher VD. This instability arises from the creation of localized states in the a-Si during depletion. It is analyzed through experiment and two-dimensional simulation. Structural variations are described, including the application of a field plate, to stabilize transistor drive current. Reliability and process uniformity are discussed for arrays of transistors. An appropriate circuit simulation model is discussed. Operation of output drive circuits with high-voltage thin-film transistors (TFTs) is shown, and the application of these to an electrographic plotter is described
  • Keywords
    amorphous semiconductors; elemental semiconductors; insulated gate field effect transistors; power transistors; silicon; simulation; thin film transistors; 400 V; HV device; I/V characteristics; MOSFETs; TFTs; amorphous Si; circuit simulation model; drain voltage stress; electrographic plotter; fabrication; field plate; gate-controlled region; high-voltage; instability; large-area; localized states; offset gate structure; offset region; output drive circuits; process uniformity; reliability; space charge limited current; thin-film transistors; transistor arrays; two-dimensional simulation; Amorphous silicon; Circuit simulation; Fabrication; MOSFETs; Semiconductor thin films; Space charge; Space technology; Stress; Thin film transistors; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.199371
  • Filename
    199371