DocumentCode
863963
Title
Match Sensing Using Match-Line Stability in Content-Addressable Memories (CAM)
Author
Tyshchenko, Oleksiy ; Sheikholeslami, Ali
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON
Volume
43
Issue
9
fYear
2008
Firstpage
1972
Lastpage
1981
Abstract
This paper presents a match-line (ML) sensing scheme that distinguishes a match from a miss by first shunting every ML with a fixed negative resistance, then exciting the MLs with an initial charge, and subsequently observing their voltage developments. It is shown that the voltage on the matched ML will grow to VDD as in an unstable system, whereas the voltage on a missed ML will decay to zero, as in a stable system. Since the initial excitation charge on the ML´s can be as low as the noise level in the system, this scheme can approach the minimum possible energy consumption level for match-line sensing. We have implemented, in 0.18 mum CMOS, a 144 times 144 ternary CAM array that includes the stability-based sensing scheme along with two previously-reported sensing schemes. The measured results confirm the power savings of the proposed sensing scheme. In addition, the CAM includes a pipelined search-line (SL) architecture that can reduce the SL portion of CAM power by up to 50%.
Keywords
CMOS memory circuits; content-addressable storage; CAM array; CMOS; content-addressable memory; energy consumption; match-line sensing; match-line stability; search-line architecture; size 0.18 mum; CADCAM; Computer aided manufacturing; Energy consumption; Image coding; Multilevel systems; Noise level; Pipeline processing; Power measurement; Stability; Voltage; CAM; Content-addressable memory; match-line power; match-line sensing; search-line driving; search-line pipelining; search-line power; stability-based sensing;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2008.2001932
Filename
4625996
Link To Document