DocumentCode
864316
Title
A high-performance pipelined architecture for measurement and monitoring of multiple sensor signals
Author
Rotithor, H.G.
Author_Institution
Dept. of Electr. Eng., Worcester Polytech. Inst., MA, USA
Volume
41
Issue
6
fYear
1992
fDate
12/1/1992 12:00:00 AM
Firstpage
808
Lastpage
814
Abstract
A high-performance pipelined architecture with hardware sharing for measurement and monitoring of signals generated by sensors that measure physical quantities is presented. Pipelining provides the necessary computational power and has potential for minimizing the input sampling to output monitoring delay, while hardware sharing results in a lower cost. The three segments in the pipeline are: sample acquisition, sample processing, and output monitoring. Each segment is implemented using one or more microprocessors. Various considerations involved in the design of a pipelined architecture are discussed, and a simple model to predict the computing power required and the maximum delay incurred for an application is presented
Keywords
computer architecture; computerised instrumentation; computerised monitoring; pipeline processing; sensor fusion; signal processing equipment; measurement; monitoring; multiple sensor signals; output monitoring; pipelined architecture; sample acquisition; sample processing; Computer architecture; Costs; Delay; Hardware; Microprocessors; Monitoring; Pipeline processing; Predictive models; Signal generators; Signal sampling;
fLanguage
English
Journal_Title
Instrumentation and Measurement, IEEE Transactions on
Publisher
ieee
ISSN
0018-9456
Type
jour
DOI
10.1109/19.199412
Filename
199412
Link To Document