DocumentCode
864418
Title
Runahead execution: An effective alternative to large instruction windows
Author
Mutlu, Onur ; Stark, Jared ; Wilkerson, Chris ; Patt, Yale N.
Author_Institution
Texas Univ., Austin, TX, USA
Volume
23
Issue
6
fYear
2003
Firstpage
20
Lastpage
25
Abstract
An instruction window that can tolerate latencies to DRAM memory is prohibitively complex and power hungry. To avoid having to build such large windows, runahead execution uses otherwise-idle clock cycles to achieve an average 22 percent performance improvement for processors with instruction windows of contemporary sizes. This technique incurs only a small hardware cost and does not significantly increase the processor´s complexity.
Keywords
computer architecture; instruction sets; storage management; DRAM memory; computer architecture; instruction windows; runahead execution; Clocks; Costs; Delay; Energy consumption; Hardware; Microarchitecture; Out of order; Random access memory; Registers; Retirement;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2003.1261383
Filename
1261383
Link To Document