Title :
Exploiting ILP, TLP, and DLP with the polymorphous trips architecture
Author :
Sankaralingam, K. ; Nagarajan, R. ; Haiming Liu ; Changkyu Kim ; Jaehyuk Huh ; Burger, Danilo ; Keckler, Stephen W. ; Moore, C.
Author_Institution :
Texas Univ., Austin, TX, USA
Abstract :
The Tera-op reliable intelligently adaptive processing system (TRIPS) architecture seeks to deliver system-level configurability to applications and runtime systems. It does so by employing the concept of polymorphism, which permits the runtime system to configure the hardware execution resources to match the mode of execution and demands of the compiler and application.
Keywords :
parallel architectures; program compilers; DLP; ILP; TLP; TRIPS architecture; Tera-op reliable intelligently adaptive processing system; compiler; polymorphism; polymorphous TRIPS architecture; runtime systems; system-level configurability; Computer applications; Computer architecture; Digital signal processors; Graphics; Logic arrays; Network servers; Parallel processing; Registers; Systolic arrays;
Journal_Title :
Micro, IEEE
DOI :
10.1109/MM.2003.1261386
