Title :
On the calculation of the capacitance coefficients for VLSI multilevel metallization lines by using domain methods
Author :
Matzke, W.E. ; Heinemann, B. ; Telschow, G.
Author_Institution :
Inst. for Phys. of Semicond., Acad. of Sci., Frankfurt Oder, East Germany
fDate :
2/1/1989 12:00:00 AM
Abstract :
The charge calculation step in domain-method-based capacitance simulators, which has a considerable influence on the accuracy of the numerical results as well as the computational expense, is considered. The different calculation methods are discussed, and an efficient algorithm for charge calculation, which is based on an appropriate domain integral formulation, is developed
Keywords :
VLSI; capacitance; metallisation; numerical methods; VLSI; calculation methods; capacitance calculation; charge calculation step; domain integral formulation; domain methods; efficient algorithm; multilevel metallization lines; Chip scale packaging; Computational modeling; Conductors; Integral equations; Integrated circuit interconnections; Metallization; Parasitic capacitance; Silicon; Very large scale integration; Wires;
Journal_Title :
Electron Devices, IEEE Transactions on
