Title :
1.5 V CMOS companding filter
Author :
López-Martín, A.J. ; Carlosena, A.
Author_Institution :
Dept. of Electr. & Electron. Eng., Public Univ. of Navarra, Spain
fDate :
10/24/2002 12:00:00 AM
Abstract :
A 1.5 V CMOS integrated filter based on MOS translinear techniques is presented. The internal voltage swing compression due to its companding nature, together with the biasing strategy employed lead to very low supply voltage requirements. Measurement results demonstrate on silicon the proposed technique, readily extendable to higher-order filters.
Keywords :
CMOS analogue integrated circuits; compandors; current-mode circuits; low-pass filters; low-power electronics; 1.5 V; CMOS companding filter; MOS translinear technique; SRD low-pass filter; Si; biasing method; current-mode filter; internal voltage swing compression; low-voltage integrated circuit;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20020913
